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PRACE Summer School on Code Optimisation for Multi-Core and Intel® MIC Architecture

The Partnership for Advanced Computing in Europe (PRACE) is pleased to announce the Summer School on Code Optimisation for Multi-Core and Intel® Many Integrated Core (MIC) architecture, which will be held from 21st to 23rd June 2012 at the Swiss National Supercomputing Centre in Lugano, Switzerland.

In this three day intensive event participants will focus on programming and tuning techniques for modern multi- and many-core processors with a particular focus on the Intel® Many Integrated Core architecture. Topics will be presented at an advanced level and will include structuring code to enable SIMD/vectorization, efficient usage of register, cache and memory hierarchies, use of multi-threading techniques to maximize resource utilization, data locality considerations on multi-socket NUMA nodes, and inter-node communication. Intel specialists will introduce the Intel® MIC architecture and the Intel programming environment, and will delve into greater detail of the use of multi- and many-core programming techniques. Demonstrations and hands-on sessions will be integrated throughout the course to illustrate the topics in greater depth, and user case studies will highlight real-world experiences in optimising scientific (HPC) codes on the Intel® MIC architecture.

Dates: 21st – 23rd June 2012Location: Swiss National Supercomputing Centre, Lugano, SwitzerlandRegistration: To apply for a place please go to here (http://survey.ipb.ac.rs/index.php?s…)Registration deadline: 11th May 2012.

The school is offered free of charge to students and academics residing in PRACE member states, and lunches, coffee breaks and an evening dinner event will be provided. Please note that a sound knowledge of C, C++ or Fortran is a pre-requisite for this course. Attendance is limited to 30 places, and selection of participants will be based on demonstrated understanding of computational science and high-performance computing and experience with at least one of MPI, OpenMP, or multi-core programming. Registration closes Friday 11th May 2012, but we encourage applicants to apply as early as possible. Candidates will be informed of the results of their application by the second week of May (at the latest).

For further information please contact:Dr Tim RobinsonCSCS – Swiss National Supercomputing CentreVia Trevano 131, 6900 Lugano, SwitzerlandE-mail: tim.robinson@cscs.ch

About PRACEThe Partnership for Advanced Computing in Europe (PRACE) is an international non-profit association with its seat in Brussels. The PRACE Research Infrastructure (RI) provides a persistent world-class High Performance Computing (HPC) service for scientists and researchers from academia and industry. The Implementation Phase of PRACE receives funding from the EU’s Seventh Framework Programme (FP7/2007-2013) under grant agreements n° RI-261557 and n° RI-283493.

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